The present inventive concept relates to semiconductor devices and, more particularly, to three-dimensional semiconductor devices.
Semiconductor memory devices have been highly integrated for satisfying high performance and low manufacture costs, which may be required by users. Because integration of the semiconductor memory devices may be an important factor in determining product price, highly integrated semiconductor memory devices are increasingly in demand. Integration of typical two-dimensional or planar semiconductor memory devices is primarily determined by the area occupied by a unit memory cell, such that it may be greatly influenced by the level of technology for forming fin patterns. However, the extremely expensive processing equipment used to increase, pattern fineness may set a practical limitation on increasing the integration of two-dimensional or planar semiconductor devices.
To overcome the above limitations, three-dimensional semiconductor memory devices having three-dimensionally arranged memory cells have been proposed. However, to mass produce three-dimensional semiconductor memory devices, new process technologies may be developed in such a manner that can provide a lower manufacturing cost per bit than two-dimensional semiconductor devices while maintaining or exceeding their level of reliability.